The present invention relates to a method of detecting cell loss and an exchange provided with a cell loss detecting function and, more particularly, to a method of detecting cell loss caused in an exchange and detecting the section in which the cell loss is caused, and an exchange provided with such a function.
There is increasing demand not only for audio communication and data communication but also for multimedia communication in which moving pictures are transmitted as well as audio and data. As a means for realizing such broadband communication, an exchanging technique in a B-ISDN (Broadband-ISDN) system which is based on an asynchronous transfer mode (ATM) is being put to practical use. In the ATM, all the information is converted into fixed length information which is called a cell and is transferred at a high speed. More specifically, in the ATM, a line is allocated to a plurality of calls by setting a multiplicity of logical links on a physical line. The moving picture data and the audio data transmitted from the terminal at each call are separated into information units (which are called ATM cells) having a fixed length, and the cells are serially transmitted to the line, thereby realizing multiplex communication.
Each cell is composed of a block having a fixed length of 53 bytes, as shown in FIG. 8. In the 53 bytes, 5 bytes constitute a header portion and 48 bytes an information field (payload). The header portion includes a virtual channel identifier (VCI) for identifying a call so as to indicate the destination even after the data is separated into blocks. The header portion also includes a virtual path identifier (VPI) for specifying a path, a generic flow control GFC which is used for flow control between links, a payload type (PT), cell loss priority (CLP), a header error control (HEC), etc.
FIG. 9 shows the structure of an ATM exchange system. In FIG. 9, the reference numerals 11.sub.11 to 11.sub.1n, 11.sub.21 to 11.sub.2n, 11.sub.31 to 11.sub.3n, 11.sub.41 to 11.sub.4n represent line interface units (line IF units) which are connected to the corresponding transmission lines (incoming line, outgoing line), 12.sub.1 to 12.sub.4 multiplexer/demultiplexers, 13 an ATM switching unit, 14 a system controller, and 15 a maintenance terminal device. The ATM switching unit 13 is connected to the plurality of multiplexer/demultiplexers 12.sub.1 to 12.sub.4, and outputs the cell which is input from a certain multiplexer/demultiplexer to a predetermined multiplexer/demultiplexer. Each of multiplexer/demultiplexers 12.sub.1 to 12.sub.4 is connected to a plurality of line IF units 11.sub.11 to 11.sub.1n, 11.sub.21 to 11.sub.2n, 11.sub.31 to 11.sub.3n, 11.sub.41 to 11.sub.4n, respectively, concentrates and multiplexes the up cells from the plurality of line IF units and outputs the multiplexed cell to the ATM switching unit 13. In addition, the multiplexer/demultiplexers 12.sub.1 to 12.sub.4 separate the down cells from the ATM switching unit 13 and output the separated cells to the corresponding line IF units.
Each of the line IF units 11.sub.11 to 11.sub.4n is connected to the corresponding multiplexer/demultiplexers 12.sub.1 to 12.sub.4, takes ATM cells out of a payload portion of a predetermined frame type (e.g., SONET FRAME) which is input from a transmission line (incoming line) and thereafter converts the ATM cell format into an internal cell format within the exchange, outputting it to the multiplexer/demultiplexer 12. The internal cell format within the exchange has a construction in which 1 byte is added to an ATM cell format as shown in FIG. 10, and several bits of the 1 byte are used to write routing tag information TAG. The ATM switching unit 13 switches the input cell to a predetermined path by referring to the tag information TAG added thereto.
Each of the line IF units 11.sub.11 to 11.sub.4n also converts the cell having the internal cell format (FIG. 10) which is input from the multiplexer/demultiplexer into an ATM cell format (FIG. 8), and transmits the ATM cell to the transmission line side after mapping the ATM cell in the payload portion of the SONET FRAME.
The system controller 14 controls the line IF units 11.sub.11 to 11.sub.4n, the multiplexer/demultiplexers 12.sub.1 to 12.sub.4 and the ATM switching unit 13.
FIG. 11 shows the structure of the line IF units 11.sub.11 to 11.sub.4n. The reference numeral 1 represents an optical interface portion which is connected to a transmission line composed of optical fibers, and which is provided with an opto-electric converting circuit OE and an electro-optic converting circuit EO. The reference numeral 2 represents a SONET termination/ATM cell conversion portion, which converts an ATM cell format into an internal cell format within the exchange after taking the ATM cells out of the payload of a SONET FRAME. The SONET termination/ATM cell conversion portion 11 also converts the internal cell format input from the switch side into an ATM cell format, and transmits the ATM cell to the transmission line side after mapping the ATM cell in the payload portion of a SONET FRAME. The reference numerals 3a, 3b denote ATM layer performance monitors (MCCG) for monitoring the degree of performance degrade of the transmission line, and 4 an OAM cell processor which inserts or extracts an OAM cell. The reference numeral 5 represents a usage parameter controller which is provided with a function of preventing an extraordinary amount of cell (violator cell) beyond a predetermined band from entering the exchange due to a line trouble or the like.
An accounting portion 6 which executes an accounting operation for cells is provided with a function of measuring the flow rate of cells. The flow rate is measured for every cell having a different VPI value or VPI/VCI value. The reference numeral 7 denotes an interface portion connected to the switch side, 8 a microprocessor for controlling the line IF units as a whole, 9 a memory (DRAM) for working the microprocessor 8 and storing data, and 10 a flash memory for storing a boot program. Each of the elements 2 to 10 is connected by a bus, and the microprocessor 8 executes (1) control of looping a test cell, (2) control of collection and transmission of traffic data such as accounting information (traffic control), (3) control of alarm monitoring by an OAM cell, and the like.
As described above, since all information is transmitted and received in the form of a cell having a fixed length in the ATM, high-speed data transfer by a hardware is possible, thereby enabling high-speed data communication and high-quality image communication.
There is a case, however, in which cell data is lost (cell loss) in a module (ATM exchange module) which realizes ATM exchange due to a trouble in the hardware or the like. In this case, it is impossible to realize high-speed data communication and high-quality image communication. It is therefore necessary to quickly detect the loss (cell loss) of cell data in an ATM exchange module and to specify the section in which the cell loss is caused so as to repair and maintain the section.
It is, however, conventionally impossible to detect cell loss and to specify the section in which cell loss is caused by a simple method.